1. Field of the Invention
The present invention relates to resolving signals and more particularly to resolving differential signals in information processing systems.
2. Description of the Related Art
In computer and information processing systems, various integrated circuit chips must communicate digitally with each other over common buses. The receiving bus nodes recognize the signal as being high or low using receivers, which are also referred to as input buffers. Often the receiver is a differential receiver, i.e. a receiver that detects the difference between two input signals, referred to as the differential inputs. These input signals may be a received signal and a reference voltage or they may be a received signal and the inverse of the received signal. In either case, it is the difference between the two input signals that the receiver detects in order to determine the state of the received signal.
Integrated circuits are powered at certain voltage levels, which levels are then provided to the various components, such as the receivers, which are located on the integrated circuit. However, the nominal supply voltage for integrated circuits keeps being decreased to reduce power consumption. Additionally, fluctuations of the voltage level during operation can make the voltage level powering a receiver even lower. The lower the supply voltage, the more challenging it is to get a receiver to operate reliably.
The signal frequency at which communication occurs can limit the performance of the overall system. Thus the higher the communication frequency, the better. The maximum frequency at which a system communicates is a function not only of the time that it takes for the electromagnetic wavefronts to propagate on the bus from one chip to another, but also of the time required for the signals to be reliably recognized at the receiving bus nodes as being high or low. Characteristics which affect the time in which a signal is recognized by a receiver include the set up time of the receiver, i.e., the amount of time before a clock edge that a signal must arrive and settle to a recognized level, and the hold time of the receiver, i.e., the time that the received signal must stay at a certain level in order for that level to be detected by the receiver. Other characteristics that affect the ability of the receiver to determine that state of the received signal include the ability of the receiver to reject input noise and power supply noise and the ability of the receiver to resolve small voltage differences between the differential inputs of the receiver.
It is desirable to provide a receiver which can receive signals provided by drivers of different types. Examples of types of drivers include High Speed Transmission Logic (HSTL) drivers, Dynamic Termination Logic (DTL) drivers, and Pseudo Emitter Coupled Logic (PECL) drivers.